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ISL6296(2005) 查看數據表(PDF) - Intersil

零件编号
产品描述 (功能)
生产厂家
ISL6296
(Rev.:2005)
Intersil
Intersil Intersil
ISL6296 Datasheet PDF : 17 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ISL6296
Electrical Specifications Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: TA = -20°C to 85°C; VDD = 2.6V to 4.8V. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Device Sleep Wait Time
TSLP From when the ‘11’ Opcode is detected to the
4
-
-
µs
shut-off of the internal regulator
Auto-Sleep Time-Out Period
TASLP From the last transition detected on the XSD 0.9
-
1.1
s
bus to the device going into sleep mode
OTP ROM Write Time
TEEW From the last BT of the 2nd write data frame
-
to when device is ready to accept the next
instruction
1.8
1.9
ms
Hash Calculation Time
THASH From the last BT of the Challenge Code Word
-
1
-
BT
from the host to the Authentication Code
being available for read
Soft-Reset Time
TSRST From the last BT of the Soft-Reset instruction
-
issued by the host to the falling-edge of break
command returned by device
-
30
µs
AC CHARACTERISTICS
Oscillator Clock Frequency
Charge Pump Clock Frequency
fOSC Internal bus reference clock
505
532
560
kHz
fCP Internal high speed clock (observable only in test mode)
Low-speed mode
3.6
5
6
MHz
High-speed mode
16
20
24
MHz
Pin Descriptions
VSS (Pin1) - System ground.
NC (Pin 2) - No connection.
VDD (Pin 3) - Supply voltage.
TIO (Pin 4) - Production test I/O pin. Used only during
production testing. Must be left floating during normal
operation.
XSD (Pin 5) - Communication bus with weak internal pull-
down to VSS. This pin is a Schmitt-trigger input and an
open-drain output. An appropriate pull-up resistor is required
on the host side.
3
FN9201.0
February 1, 2005

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