ISL8013A 查看數據表（PDF） - Intersil
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ISL8013A Datasheet PDF : 17 Pages
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ISL8013A
block, only affects the operation during the start-up and
will be discussed separately. The error amplifier is a
transconductance amplifier that converts the voltage
error signal to a current output. The voltage loop is
internally compensated with the 27pF and 390kΩ RC
network. The maximum EAMP voltage output is precisely
clamped to 1.6V.
VEAMP
VCSA
DUTY
CYCLE
IL
VOUT
FIGURE 36. PWM OPERATION WAVEFORMS
SKIP Mode
Pulling the SYNCH pin LO (<0.4V) forces the converter
into PFM mode. The ISL8013A enters a pulse-skipping
mode at light load to minimize the switching loss by
reducing the switching frequency. Figure 37 illustrates
the skip-mode operation. A zero-cross sensing circuit
shown in Figure 2 monitors the N-MOSFET current for
zero crossing. When 8 consecutive cycles of the inductor
current crossing zero are detected, the regulator enters
the skip mode. During the eight detecting cycles, the
current in the inductor is allowed to become negative.
The counter is reset to zero when the current in any cycle
does not cross zero.
Once the skip mode is entered, the pulse modulation
starts being controlled by the SKIP comparator shown in
Figure 2. Each pulse cycle is still synchronized by the
PWM clock. The P-MOSFET is turned on at the clock's
rising edge and turned off when the output is higher than
1.5% of the nominal regulation or when its current
reaches the peak Skip current limit value. Then the
inductor current is discharging to 0A and stays at zero.
The internal clock is disabled.The output voltage reduces
gradually due to the load current discharging the output
capacitor. When the output voltage drops to the nominal
voltage, the P-MOSFET will be turned on again at the
rising edge of the internal clock as it repeats the previous
operations.
The regulator resumes normal PWM mode operation
when the output voltage drops 1.5% below the nominal
voltage.
Synchronization Control
The frequency of operation can be synchronized up to
4MHz by an external signal applied to the SYNCH pin.
The falling edge on the SYNCH triggers the rising edge of
the LX pulse. Make sure that the minimum on time of the
LX node is greater than 140ns.
Overcurrent Protection
The overcurrent protection is realized by monitoring the
CSA output with the OCP comparator, as shown in
Figure 2. The current sensing circuit has a gain of
250mV/A, from the P-MOSFET current to the CSA
output. When the CSA output reaches 1.4V, which is
equivalent to 4.8A for the switch current, the OCP
comparator is tripped to turn off the P-MOSFET
immediately. The overcurrent function protects the
switching converter from a shorted output by
monitoring the current flowing through the upper
MOSFET.
Upon detection of overcurrent condition, the upper
MOSFET will be immediately turned off and will not be
turned on again until the next switching cycle. Upon
detection of the initial overcurrent condition, the
overcurrent fault counter is set to 1. If, on the
subsequent cycle, another overcurrent condition is
detected, the OC fault counter will be incremented. If
there are 17 sequential OC fault detections, the regulator
will be shut down under an overcurrent fault condition.
An overcurrent fault condition will result in the regulator
attempting to restart in a hiccup mode within the delay of
four soft-start periods. At the end of the fourth soft-start
wait period, the fault counters are reset and soft-start is
attempted again. If the overcurrent condition goes away
during the delay of four soft-start periods, the output will
resume back into regulation point after hiccup mode
expires.
Short-Circuit Protection
The short-circuit protection SCP comparator monitors the
VFB pin voltage for output short-circuit protection. When
the VFB is lower than 0.2V, the SCP comparator forces
the PWM oscillator frequency to drop to 1/3 of the normal
operation value. This comparator is effective during start-
up or an output short-circuit event.
13
FN7526.0
November 25, 2009
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