ISL8002(2013_01) 查看數據表（PDF） - Intersil

零件编号

产品描述 (功能)

比赛名单

ISL8002
(Rev.:2013_01)

Compact Synchronous Buck Regulators

Intersil 

ISL8002, ISL8002A, ISL80019, ISL80019A

Functional Block Diagram

SOSoFfTt-

START

COMP

27pF

*

200kΩ

MODE

SHUTDOWN

EN

VREF

BANDGAP

EAMP

SHUTDOWN

-

3pF

+

FB

6kΩ

1.15*VREF

-

SSLlOoPpEe

COMP

+

OV

-

0.85*VREF

+

UV

VIN

5MΩ

PG

1ms

DELAY

+

COMP

-

OSCILLATOR

PWM/PFM

LOGIC

CONTROLLER

PROTECTION

HS DRIVER

+

OCP

-

+

SKIP

-

+

CSA

-

NEG CURRENT

SENSING

0.3V

-

SCP

+

ZERO-CROSS

SENSING

SHUTDOWN

100Ω

VIN

P

PHASE

N

PGND

* By default, when COMP is tied to VIN, the voltage loop is internally compensated with the 27pF and 200kΩ RC network.

Please see "COMP" pin in the “Pin Descriptions” table on page 4 for more details.

FIGURE 3. FUNCTIONAL BLOCK DIAGRAM

5

FN7888.1

January 7, 2013

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