ISL8490E 查看數據表（PDF） - Intersil
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ISL8490E Datasheet PDF : 13 Pages
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ISL8488E, ISL8489E, ISL8490E, ISL8491E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C,
(Note 4). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP MIN
MAX
(°C) (NOTE 9) TYP (NOTE 9) UNITS
Receiver Short-Circuit Current
IOSR 0V ≤ VO ≤ VCC
SWITCHING CHARACTERISTICS (ISL8488E, ISL8489E)
Full
7
-
85
mA
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
250
400
2000
ns
Driver Output Skew
tSKEW RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
160
800
ns
Driver Differential Rise or Fall Time
tR, tF RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
250
600
2000
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3, Note 8) Full
250
1000 2000
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3, Note 8) Full
250
860
2000
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3, Note 8) Full
300
660 3000
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3, Note 8) Full
300
640
3000
ns
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Full
250
500
2000
ns
Receiver Skew | tPLH - tPHL |
tSKD (Figure 4)
25
-
60
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND (Figure 5, Note 8) Full
-
10
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC (Figure 5, Note 8) Full
-
10
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 5, Note 8) Full
-
10
50
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 5, Note 8) Full
-
10
50
ns
Maximum Data Rate
fMAX
Full
250
-
-
kbps
SWITCHING CHARACTERISTICS (ISL8490E, ISL8491E)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
13
Driver Output Skew
tSKEW RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
Driver Differential Rise or Fall Time
tR, tF RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
5
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3, Note 8) Full
-
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3, Note 8) Full
-
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3, Note 8) Full
-
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3, Note 8) Full
-
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Full
30
Receiver Skew | tPLH - tPHL |
tSKD (Figure 4)
25
-
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND (Figure 5, Note 8) Full
-
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC (Figure 5, Note 8) Full
-
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 5, Note 8) Full
-
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 5, Note 8) Full
-
Maximum Data Rate
fMAX
Full
10
ESD PERFORMANCE
24
50
ns
3
10
ns
12
25
ns
14
70
ns
14
70
ns
44
70
ns
21
70
ns
90
150
ns
5
-
ns
9
50
ns
9
50
ns
9
50
ns
9
50
ns
-
-
Mbps
RS-485 Pins (A, B, Y, Z)
Human Body Model
25
-
±15
-
kV
All Other Pins
25
-
>±7
-
kV
NOTES:
4. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
5. Supply current specification is valid for loaded drivers when DE = 0V.
6. Applies to peak current. See “Typical Performance Curves” on page 9 for more information.
7. Devices meeting these limits are denoted as “single unit load (1 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus.
8. Not applicable to the ISL8488E, ISL8490E.
9. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
5
FN6073.4
July 26, 2007
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