ISL8510 查看數據表（PDF） - Intersil

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ISL8510

Dual Output Controller with 1A Standard Buck PWM and LDO

Intersil 

ISL8510

In order to dissipate heat generated by the internal VTT

LDO, the ground pad, pin 29, should be connected to the

internal ground plane through at least four vias. This allows

the heat to move away from the IC and also ties the pad to

the ground plane through a low impedance path.

The switching components should be placed close to the

ISL6537 first. Minimize the length of the connections

between the input capacitors, CIN, and the power switches

by placing them nearby. Position both the ceramic and bulk

input capacitors as close to the upper MOSFET drain as

possible. Position the output inductor and output capacitors

between the upper and lower MOSFETs and the load.

The critical small signal components include any bypass

capacitors, feedback components, and compensation

components. Place the PWM converter compensation

components close to the FB and COMP pins. The feedback

resistors should be located as close as possible to the FB

pin with vias tied straight to the ground plane as required.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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20

FN6516.2

December 15, 2008

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