MU9C8358-QHC 查看數據表（PDF） - Music Semiconductors

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MU9C8358-QHC

Quad 10/100Mb Ethernet Filter Interface

Music Semiconductors 

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The Daisy Chain Enable signal performs two functions.

The /EC signal enables the LANCAMs /MF output to

show the results of a comparison. If /EC is LOW at the

falling edge of /E in a cycle, the /MF flag output is

enabled; otherwise, /MF is held HIGH. The /EC signal

also enables the /MF-/MI daisy chain that serves to select

the device with the highest-priority match in a string of

LANCAMs.

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The /MI LANCAM Match flag input is used to indicate to

the MU9C8358 the conditions of the LANCAM Match

flag. The /MF output from the LANCAM should be

connected to this pin. If more than one LANCAM is used,

/MI should be connected to the /MF pin of the last

LANCAM in the daisy chain.

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The /FI LANCAM Full flag input is used to indicate to the

MU9C8358 the condition of the LANCAM Full flag. The

/FF output from the LANCAM should be connected to this

pin. If more than one LANCAM is used, /FI should be

connected to the /FF of the last device in the daisy chain.

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/RESET_LC is LOW whenever /RESET is LOW. It is

taken HIGH only by writing to bit 0 in the System

Dynamic Configuration (SDCFG) register. See SDCFG

register information. /RESET_LC is used only on the

master device; it is left unconnected on the slave device

when two MU9C8358s are connected together.

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The MU9C8358 configured as MASTER provides this

signal as an output. An MU9C8358 configured as a

SLAVE uses this signal as input. This signal is not used in

a single MU9C8358 application and may be left

unconnected. (See Timing Diagrams: Timing Data for

Control Interfaces).

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The MU9C8358 configured as the MASTER must

monitor the attached slave device to determine which

device gains access to the CAM in a given processing

cycle. These signals are not used in a single MU9C8358

application, and may be left unconnected. (See Timing

Diagrams: Timing Data for Control Interfaces).

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Please refer to IEEE Standard 1149.1 for information on

using the mandatory JTAG functions. The optional

HIGH-Z function is implemented and may be activated by

writing 0011 to the JTAG Instruction register.

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The /TRST is the Test Reset pin. It is internally pulled up

with a 3k minimum resistor. It must be tied to /RESET or

tied LOW when the JTAG port is not used.

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The TCK input is the Test Clock input. It can be tied at a

valid logic level 1 when not in use. This pin is internally

pulled up with a 3k minimum resistor.

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The TMS input is the Test Mode Select input. This pin is

internally pulled up with a 3k minimum resistor.

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The TDI input is the Test Data input. This pin is internally

pulled up with a 3k minimum resistor.

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The TDO output is the Test Data output.

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This pin is used for internal MUSIC Semiconductor

testing only and should NOT be left as “NO CONNECT”

in system applications, but must have a pull-up resistor to

VCC (typically 10K Ohms).

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These pins are the power supply connections to the

MU9C8358. VCC must meet the voltage supply

requirements in the Operating Conditions section relative

to the GND pins, which are at 0 Volts (system reference

potential), for correct operation of the device.



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