LA74308LP 查看數據表（PDF） - SANYO -> Panasonic

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LA74308LP

Audio Interface for DSC

SANYO -> Panasonic 

LA74308LP

POWER ON RESET Condition (SERIAL communication)

H

Power Supply

L

H

STANDBY control

(Pin 3)

L

H

POWER ON PULSE

(Signal inside IC)

L

H

C.S.

(Pin 6)

L

H

Data

(Pin 8)

L

HIGH to cancel STANDBY

HIGH period for about 2ms

cd

(First C.S.)

Dummy communication

(Second C.S.)

First DATA communication

e

Dummy Data

f

First Data

H

Clock

(Pin 7)

L

H

POWER ON RESET

(IC inside)

L

POWER ON RESET (default) state

Delay of several

hundreds ns

g

SERIAL communication

condition

(First DATA hold)

The POWER ON RESET state covers a period up to the rise f of the second C.S. input after fall d of POWER ON

PULSE c generated inside IC when the power is supplied and the STANDBY control is canceled. e is the dummy

communication.

Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in g and the normal

SERIAL communication condition begins after g.

No.A0898-5/16

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