2 Serial data input
• CL: Normal Hi
CE
LC75100M
tEL
tES
CL
tSU
tHD
DI
B0 B1 B2 B3 A0 A1 A2
A3 LD2 LD1 LD0
Internal data
• CL: Normal Low
tEH
TEST2 TEST1 TEST0
tLC
(2) I2C bus control
I2C bus register
The I2C (Inter IC) bus is a bus system developed by Philips Corporation.
It controls the start and stop condition with SDA (Serial Data) and SCL (Serial Clock). The outputs of these signals
are of open drain type and wired OR.
SCL
SDA
S
ACK
ACK
P
S: Start condition/P: Stop condition/ACK: Acknowledge
Data is transferred MSB first.
One unit is made up of 8 bits. ACK is returned by the slave for acknowledgement.
The slave IC reads the data on the rising edge of SCL.
The master IC changes the data on the falling edge of SCL.
1 Control registers
• Slave Address
MSB
LSB
0
0
1
1
1
0
0
0
Note: The LC75100M can be used in the receive only mode if the LSB is set to 0.
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