LC863448C 查看數據表（PDF） - SANYO -> Panasonic
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LC863448C Datasheet PDF : 18 Pages
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LC863448C/40C/32C/28C/24C/20C/16C
Interrupts
• 12 sources 8 vectored interrupts
1. External Interrupt INT0
2. External Interrupt INT1
3. External Interrupt INT2, Timer/counter T0L (Lower 8 bits)
4. External Interrupt INT3, base timer
5. Timer/counter T0H (Upper 8 bits)
6. Data slicer
7. Vertical synchronous signal interrupt (VS), horizontal line (HS)
8. IIC, Software
• Interrupt Priority Control
Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high
priority can be assigned to the interrupts from 3 to 8 listed above. For the external interrupt INT0 and INT1, low or
highest priority can be set.
Sub-routine Stack Level
• A maximum of 128 levels (stack is built in the internal RAM)
Multiplication/Division Instruction
• 16 bits×8 bits (7 instruction cycle times)
• 16 bits÷8 bits (7 instruction cycle times)
3 Oscillation Circuits
• Built-in RC oscillation circuit used for the system clock
• Built-in VCO circuit used for the system clock and OSD
• X’tal oscillation circuit used for base timer, system clock and PLL reference
Standby Function
• HALT mode
The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is stopped.
This mode can be released by the interrupt request or the system reset.
• HOLD mode
The HOLD mode is used to stop the oscillations; RC (internal), VCO, and X’tal oscillations. This mode can be
released by the following conditions.
- Pull the reset terminal (RES) to low level.
- Feed the selected level to either P70/INT0 or P71/INT1.
Package
• MFP36SDJ(375mil) : Lead-free type
• DIP36S(400mil) : Lead-free type
Development Tools
• Flash EEPROM:
• Evaluation chip:
• Emulator:
LC86F3448B
LC863096
EVA86000 (main) + ECB863200A (evaluation chip board)
+ SUB863400A (sub board)
+ POD36-CABLE (cable)
+ POD36-DIP (for DIP36S)
or POD36-MFP (for MFP36SDJ)
No.A0117-4/18
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