LP62S16512-T 查看數據表（PDF） - AMIC Technology

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LP62S16512-T

512K X 16 BIT LOW VOLTAGE CMOS SRAM

AMIC Technology 

Timing Waveforms (continued)

Write Cycle 1

(Write Enable Controlled)

Address

CS1

CS2

HB, LB

tAS1

WE

DATA IN

DATA OUT

tWC

tAW

tCW

tBW

tWP2

tDW

tWHZ4

Write Cycle 2

(Chip Enable Controlled)

Address

CS1

CS2

HB, LB

WE

DATA IN

DATA OUT

tAS1

tWC

tAW

tCW1 , tCW2

tWHZ4

tBW

tWP

tDW

(August, 2004, Version 1.3)

8

LP62S16512-T Series

tWR3

tDH

tOW

tWR3

tDH

tOW

AMIC Technology, Corp.

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