LT3685E 查看數據表（PDF） - Linear Technology

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LT3685E

36V, 2A, 2.4MHz Step-Down Switching Regulator

Linear Technology 

LT3685

APPLICATIONS INFORMATION

Shorted and Reversed Input Protection

If the inductor is chosen so that it won’t saturate exces-

sively, an LT3685 buck regulator will tolerate a shorted

output. There is another situation to consider in systems

where the output will be held high when the input to the

LT3685 is absent. This may occur in battery charging ap-

plications or in battery backup systems where a battery

or some other supply is diode OR-ed with the LT3685’s

output. If the VIN pin is allowed to float and the RUN/SS

pin is held high (either by a logic signal or because it is

tied to VIN), then the LT3685’s internal circuitry will pull

its quiescent current through its SW pin. This is fine if

your system can tolerate a few mA in this state. If you

ground the RUN/SS pin, the SW pin current will drop to

essentially zero. However, if the VIN pin is grounded while

the output is held high, then parasitic diodes inside the

LT3685 can pull large currents from the output through

the SW pin and the VIN pin. Figure 7 shows a circuit that

will run only when the input voltage is present and that

protects against a shorted or reversed input.

D4

MBRS140

VIN

VIN

BOOST

LT3685

RUN/SS

SW

VC

GND FB

VOUT

BACKUP

3685 F07

Figure 7. Diode D4 Prevents a Shorted Input from

Discharging a Backup Battery Tied to the Output. It Also

Protects the Circuit from a Reversed Input. The LT3685

Runs Only When the Input is Present

PCB Layout

For proper operation and minimum EMI, care must be

taken during printed circuit board layout. Figure 8 shows

the recommended component placement with trace,

ground plane and via locations. Note that large, switched

currents flow in the LT3685’s VIN and SW pins, the catch

diode (D1) and the input capacitor (C1). The loop formed

L1

VOUT

C2

RRT

CC

RC

R2

R1

D1

C1

GND

RPG

VIAS TO LOCAL GROUND PLANE

VIAS TO VOUT

VIAS TO SYNC

VIAS TO RUN/SS

VIAS TO PG

3685 F08

VIAS TO VIN

OUTLINE OF LOCAL

GROUND PLANE

Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation

by these components should be as small as possible. These

components, along with the inductor and output capacitor,

should be placed on the same side of the circuit board,

and their connections should be made on that layer. Place

a local, unbroken ground plane below these components.

The SW and BOOST nodes should be as small as possible.

Finally, keep the FB and VC nodes small so that the ground

traces will shield them from the SW and BOOST nodes.

The Exposed Pad on the bottom of the package must be

soldered to ground so that the pad acts as a heat sink. To

keep thermal resistance low, extend the ground plane as

much as possible, and add thermal vias under and near

the LT3685 to additional ground planes within the circuit

board and on the bottom side.

Hot Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of LT3685 circuits. However, these capaci-

tors can cause problems if the LT3685 is plugged into a

live supply (see Linear Technology Application Note 88 for

3685fb

16

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