LTC1872BES6 查看數據表（PDF） - Linear Technology

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LTC1872BES6

Constant Frequency Current Mode Step-Up DC/DC Controller in ThinSOT

Linear Technology 

LTC1872B

APPLICATIONS INFORMATION

Efficiency Considerations

The efficiency of a switching regulator is equal to the

output power divided by the input power times 100%. It is

often useful to analyze individual losses to determine what

is limiting the efficiency and which change would produce

the most improvement. Efficiency can be expressed as:

Efficiency = 100% – (η1 + η2 + η3 + ...)

where η1, η2, etc. are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC1872B circuits: 1) LTC1872B DC bias cur-

rent, 2) MOSFET gate charge current, 3) I2R losses and 4)

voltage drop of the output diode.

1. The VIN current is the DC supply current, given in the

electrical characteristics, that excludes MOSFET driver

and control currents. VIN current results in a small loss

which increases with VIN.

2. MOSFET gate charge current results from switching

the gate capacitance of the power MOSFET. Each time

a MOSFET gate is switched from low to high to low

again, a packet of charge, dQ, moves from VIN to

ground. The resulting dQ/dt is a current out of VIN

which is typically much larger than the contoller’s DC

supply current. In continuous mode, IGATECHG = f(Qp).

3. I2R losses are predicted from the DC resistances of the

MOSFET, inductor and current sense resistor. The

MOSFET RDS(ON) multiplied by duty cycle times the

average output current squared can be summed with

I2R losses in the inductor ESR in series with the current

sense resistor.

4. The output diode is a major source of power loss at

high currents. The diode loss is calculated by multiply-

ing the forward voltage by the load current.

5. Transition losses apply to the external MOSFET and

increase at higher operating frequencies and input

voltages. Transition losses can be estimated from:

Transition Loss = 2(VIN)2IIN(MAX)CRSS(f)

Other losses, including CIN and COUT ESR dissipative

losses, and inductor core losses, generally account for

less than 2% total additional loss.

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1872B. These items are illustrated graphically in the

layout diagram in Figure 6. Check the following in your

layout:

1. The Schottky diode should be closely connected

between the output capacitor and the drain of the

external MOSFET.

2. The (+) plate of CIN should connect to the sense

resistor as closely as possible. This capacitor provides

AC current to the inductor.

3. The input decoupling capacitor (0.1µF) should be

connected closely between VIN (Pin 5) and ground

(Pin 2).

4. Connect the end of RSENSE as close to VIN (Pin 5) as

possible. The VIN pin is the SENSE + of the current

comparator.

5. The trace from SENSE– (Pin 4) to the Sense resistor

should be kept short. The trace should connect close

to RSENSE.

6. Keep the switching node NGATE away from sensitive

small signal nodes.

7. The VFB pin should connect directly to the feedback

resistors. The resistive divider R1 and R2 must be

connected between the (+) plate of COUT and signal

ground.

9

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