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LTC2202I(RevB) 查看數據表(PDF) - Linear Technology

零件编号
产品描述 (功能)
比赛名单
LTC2202I
(Rev.:RevB)
Linear
Linear Technology Linear
LTC2202I Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC2203/LTC2202
TI I G CHARACTERISTICS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
fS
tL
tH
tAP
tD
tC
tSKEW
Pipeline
Latency
PARAMETER
Sampling Frequency
CLK Low Time
CLK High Time
Sample-and-Hold
Aperture Delay
CLK to DATA Delay
CLK to CLKOUT Delay
DATA to CLKOUT Skew
DATA Access Time
Bus Relinquish Time
CONDITIONS
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
CL = 5pF (Note 7)
CL = 5pF (Note 7)
CL = 5pF (Note 7)
CL = 5pF (Note 7)
(Note 7)
LTC2203
LTC2202
MIN TYP MAX MIN TYP MAX
1
25 1
10
18.9 20
5
20
500 40
500 5
50 500
50 500
18.9 20
5
20
500 40
500 5
50 500
50 500
0.9
0.9
1.3 3.1
1.3 3.1
–0.6 0
5
5
7
4.9 1.3 3.1 4.9
4.9 1.3 3.1 4.9
0.6 –0.6 0 0.6
15
5 15
15
5 15
7
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND, with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: VDD = 3.3V, fSAMPLE = 25MHz (LTC2203), 10MHz (LTC2202),
input range = 2.5VP-P with differential drive (PGA = 0), unless otherwise
specified.
Note 5: Integral nonlinearity is defined as the deviation of a code from a
“best fit straight line” to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 6: Offset error is the offset voltage measured from –1/2LSB when the
output code flickers between 0000 0000 0000 0000 and 1111 1111 1111
1111 in 2’s complement output mode.
Note 7: Guaranteed by design, not subject to test.
Note 8: Recommended operating conditions.
Note 9: Dynamic current from switched capacitor inputs is large compared
to DC leakage current, and will vary with sample rate.
Note 10: Leakage current will experience transient at power up. Keep
resistance < 1K Ω.
TI I G DIAGRA
ANALOG
INPUT
CLK
D0-D15, OF
CLKOUT+
CLKOUT–
tAP
N+1
N
tL
tH
N+2
N+3
tD
N–7
tC
N–6
N–5
N–4
N+4
N–3
22032 TD01
22032fb
6

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