M61538FP 查看數據表（PDF） - Renesas Electronics

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M61538FP

6-Channel Electronic Volume

Renesas Electronics 

M61538FP

Clock and Data Timings

DATA

75%

25%

(D0 ~ D15)

t cr

tSLD tHLD tSHD tHHD

75%

50%

25%

CLOCK

tr

tf

tWHC

tWLC

LATCH

tSLD tHLD

Timing Definition of Digital Block

Parameter

CLOCK cycle time

CLOCK pulse width (“H” level)

CLOCK pulse width (“L” level)

Rising time of clock and data

Falling time of clock and data

DATA setup time (Rising time of clock)

DATA setup time (Falling time of clock)

DATA hold time (“H” level)

DATA hold time (“L” level)

Symbol

Min

tcr

8

tWHC

3.2

tWLC

3.2

tr

—

tf

—

tSHD

1.6

tSLD

1.6

tHHD

1.6

tHLD

1.6

Limits

Typ

Max

—

—

—

—

—

—

—

0.8

—

0.8

—

—

—

—

—

—

—

—

Units

µs

Rev.1.0, Mar.23.2004, page 5 of 11

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