• 1/3 duty
LC75804E, LC75804W
VDD
VLCD
t1 t2
VDET
CE
D1 to D78
Internal data S0, S1, K0, K1
P0 to P3, SC, DR, DT
Internal data (D79 to D153)
Internal data (D154 to D228)
Display and control data transfer
Undefined
VIL
Defined
Undefined
Defined
Undefined
System reset period
Defined
t3 t4
VDET
Undefined
Undefined
Undefined
• 1/4 duty
Note: t1 ≥ 1 [ms] (Logic block power supply voltage VDD rise time)
t2 ≥ 0
t3 ≥ 0
t4 ≥ 1 [ms] (Logic block power supply voltage VDD fall time)
Figure 3
VDD
VLCD
t1 t2
VDET
CE
D1 to D76
Internal data S0, S1, K0, K1
P0 to P3, SC, DR, DT
Internal data (D77 to D152)
Internal data (D153 to D228)
Internal data (D229 to D300)
Display and control data transfer
Undefined
VIL
Defined
Undefined
Defined
Undefined
Defined
Undefined
System reset period
Defined
t3 t4
VDET
Undefined
Undefined
Undefined
Undefined
Note: t1 ≥ 1 [ms] (Logic block power supply voltage VDD rise time)
t2 ≥ 0
t3 ≥ 0
t4 ≥ 1 [ms] (Logic block power supply voltage VDD fall time)
Figure 4
No. 6266-24/37