LC75804E, LC75804W
Sample Application Circuit 6
1/4 duty, 1/2 bias (for use with large panels)
+5V
*9
10 kΩ ≥ R ≥ 1 kΩ
C ≥ 0.047 µF
+5.5V
R
CR
VDD
VSS
TEST
VLCD
VLCD1
VLCD2
OSC
COM1
COM2
COM3
S74/COM4
P1/S1
P2/S2
P8/S8
S9
(P1)
(P2)
(P8)
(general-purpose output ports)
Used with the backlight
controller or other circuit.
From the controller
To the controller
To the controller
power supply
*11
RES *10
CE
CL
DI K K K K K
DO
IIIII
54321
S S S73
77
65
//
KKKKKK
SSSSSS
654321
(S75)
(S76)
Key matrix
(up to 30 keys)
Notes:*9. Add a capacitor to the logic block power supply line so that the logic block power supply voltage VDD rise time when power is applied and the logic
block power supply voltage VDD fall time when power drops are both at least 1 ms, as the LC75804E/W is reset by the VDET.
*10. If the RES pin is not used for system reset, it must be connected to the logic block power supply VDD.
*11. The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 to 10 kΩ) appropriate for the capacitance of
the external wiring so that signal waveforms are not degraded.
No. 6266-32/37