CY7C43684-15 查看數據表（PDF） - Cypress Semiconductor

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CY7C43684-15

1K/4K x36 x2 Bidirectional Synchronous FIFO with Bus Matching

Cypress Semiconductor 

CY7C43644

CY7C43664

CY7C43684

When reading data from FIFO1 in the byte or word format, the

unused B0–35 outputs are indeterminate.

Bus-Matching FIFO2 Writes

Data is written to the FIFO2 RAM in 36-bit long-word incre-

ments. Data written to FIFO2 with a byte or word bus size

stores the initial bytes or words in auxiliary registers. The

CLKB rising edge that writes the fourth byte or the second

word of the long-word to FIFO2 also stores the entire

long-word in FIFO2 RAM.

When reading data from FIFO2 in byte or word format, the

unused B0–35 outputs are LOW.

Retransmit (RT1, RT2)

The retransmit feature is beneficial when transferring packets

of data. It enables the receipt of data to be acknowledged by

the receiver and retransmitted if necessary. Retransmit

function applies to CY standard mode only.

The number of 36-/18-/9-bit words written into the FIFO should

be less than full depth minus 2/4/8 words between the reset of

the FIFO (master or partial) and Retransmit setup. A LOW

pulse on RT1, (RT2) resets the internal read pointer to the first

physical location of the FIFO. CLKA and CLKB may be free

running but ENB, (ENA) must be disabled during and tRTR

after the retransmit pulse. With every valid read cycle after

retransmit, previously accessed data is read and the read

pointer is incremented until it is equal to the write pointer. Flags

are governed by the relative locations of the read and write

pointers and are updated during a retransmit cycle. Data

written to the FIFO after activation of RT1, (RT2) are trans-

mitted also. The full depth of the FIFO can be repeatedly

retransmitted.

Document #: 38-06022 Rev. *B

Page 10 of 39

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