MAX2308(2001) 查看數據表（PDF） - Maxim Integrated
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MAX2308 Datasheet PDF : 20 Pages
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CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
AC ELECTRICAL CHARACTERISTICS
(MAX2306/MAX2308/MAX2309 EV kit, VCC = +2.75V, registers set to default power-up states except M1 = M2 = 306, R1 = R2 = 16,
fIN = 183.7MHz, fREF = 19.2MHz, 0.6Vp-p synthesizer locked with passive 3rd-order lead-lag loop filter, SHDN = high, VGC set for
+35dB voltage gain, differential output load = 10kΩ, all power levels referred to 50Ω, TA = +25°C, unless otherwise noted.)
PARAMETER
Input Frequency
Reference Frequency
Frequency Reference Signal
Level
SYMBOL
fIN
(Note 2)
fREF
VREF
CONDITIONS
MIN TYP MAX UNITS
40
300 MHz
39
MHz
0.2
Vp-p
SIGNAL PATH, CDMA MODE
Input 3rd-Order Intercept
Gain = -35dB, (Note 3)
IIP3 Gain = +35dB, TA = -40°C to +85°C
(Notes 4, 5)
3.4
-38 -31.0
dBm
Input 1dB Compression
Input 0.25dB Desensitization
P1dB
Gain = -35dB
Gain = +35dB
(Note 6)
Gain = -35dB
Gain = +35dB
-9
-44
-14.8
-49
dBm
dBm
Minimum Voltage Gain
Maximum Voltage Gain
DSB Noise Figure
SIGNAL PATH, FM_IQ MODE
Input 3rd-Order Intercept
AV
VVGC = 0.5V (Note 5)
AV
VVGC = 2.3V (Note 5)
Gain = -35dB
NF
Gain = +35dB
Gain = -35dB, (Note 7)
IIP3 Gain = +35dB, TA = -40°C to +85°C
(Notes 5, 8)
-56
-51
dB
57
61
dB
62.9
dBm
6.36
-6.5
-40.2 -32
dBm
Input 1dB Compression
P1dB
Minimum Voltage Gain
AV
Maximum Voltage Gain
AV
SIGNAL PATH, CDMA AND FM_IQ MODE
Gain Variation Over Temperature
Baseband 0.5dB Bandwidth
Quadrature Suppression
LO to Baseband Leakage
Saturated Output Level
VSAT
PHASE-LOCKED LOOP
VCO Tune Range
LO_OUT Output Power
FVCO_L
FVCO_H
PLO
VCO Minimum Divide Ratio
M1, M2
VCO Maximum Divide Ratio
M1, M2
Gain = -35dB
Gain = +35dB
VVGC = 0.5V (Note 5)
VVGC = 2.3V (Note 5)
Normalized to +25°C
TA = -40°C to +85°C (Note 5)
Differential
(Note 2)
(Note 2)
RL = 50Ω, BUFEN = low
-20
dBm
-44
-56.7 -52
dB
56
59.5
dB
±2.5
4.2
28
40
1
2.7
dB
MHz
dB
mVp-p
Vp-p
80
300
MHz
135
600
-13.7
dBm
256
16383
REF Minimum Divide Ratio
R1, R2
2
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