datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

MAX2314EEI 查看數據表(PDF) - Maxim Integrated

零件编号
产品描述 (功能)
比赛名单
MAX2314EEI Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
Pin Description (continued)
MAX2310
6, 7
PIN
MAX2312 MAX2314 MAX2316
5, 6
7
7
6, 7
NAME
TANKH+,
TANKH-
BUFEN
N.C.
8
MODE
9
10
11
12
13, 14
15
16, 17
18
19
20
21
22
23, 24
25
26
27, 28
8
9
10
11
12
13, 14
15
16, 17
18
19
20
21
22
23, 24
25
26
27, 28
9
10
11
12
13, 14
15
16, 17
18
19
20
21
22
23, 24
25
26
27, 28
8
9
10
11
12
13, 14
15
16, 17
18
19
20
21
22
23, 24
25
26
27, 28
LOOUT
VCC
GND
REF
SHDN
IOUT+,
IOUT-
LOCK
QOUT-,
QOUT+
CLK
EN
DATA
VCC
VGC
CDMA-,
CDMA+
FM+
N.C.
FM-
STBY
BYP
FUNCTION
Differential Tank Input for High-Frequency Oscillator
LO Buffer Amplifier—active low
No Connection. Must be left open-circuit.
Mode Select. High selects CDMA mode; low selects FM
mode.
Internal VCO Output. Depending on setting of BD bit, LOOUT
is either the VCO frequency (twice the IF frequency) or one-
half the VCO frequency (equal to the IF frequency).
+2.7V to +5.5V Supply for Digital Circuits
Digital Ground
Reference Frequency Input
Shutdown Input—active low. Low powers down entire device,
including registers and serial interface.
Differential In-Phase Baseband Output, or FM signal output
FM_I mode is selected.
Lock Output—open-collector pin. Logic high indicates phase-
locked condition.
Differential Quadrature-Phase Baseband Output. Disabled if
FM_I mode is selected.
Clock input of the 3-wire serial bus
Enable Input. When low, input shift register is enabled.
Data input of the 3-wire serial bus.
2.7V to 5.5V Supply for Analog Circuits
VGA Gain Control Input. Control voltage range is 0.5V to 2.3V.
Differential CDMA Input. Active in CDMA mode.
Differential Positive Input. Active in FM mode.
No Connection.
Differential Negative Input for FM signal. Bypass to GND for
single-ended operation.
Standby Input—active low. Low powers down VGA and demod-
ulator while keeping VCO, PLL, and serial bus on.
Bypass Node. Must be capacitively decoupled (bypassed) to
analog VCC.
_______________________________________________________________________________________ 7

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]