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MAX2424EAI

900MHz Image-Reject Receivers with Transmit Mixer

Maxim Integrated 

900MHz Image-Reject Receiver

with Transmit Mixer

_______________Detailed Description

The following sections describe each of the functional

blocks shown in the Functional Diagram.

Receiver

The MAX2424/MAX2426’s receive path consists of a

900MHz low-noise amplifier, an image-reject mixer, and

an IF buffer amplifier.

The LNA’s gain and biasing are adjustable via the LNA-

GAIN pin. Proper operation of this pin provides optimum

performance over a wide range of signal levels. The LNA

has four modes determined by the DC voltage applied on

the LNAGAIN pin. See Table 1, as well as the relevant

Typical Operating Characteristics plots.

At low LNAGAIN voltages, the LNA is shut off and the

input signal capacitively couples directly into mixer to

provide maximum linearity for large-signal operation

(receiver close to transmitter). As the LNAGAIN voltage

increases, the LNA turns on. Between 0.5V and 1V at

LNAGAIN, the LNA is partially biased and behaves like a

Class C amplifier. Avoid this operating mode for applica-

tions where linearity is a concern. As the LNAGAIN volt-

age reaches 1V, the LNA is fully biased into Class A

mode, and the gain is monotonically adjustable for LNA-

GAIN voltages above 1V. See the receiver gain, IP3, and

Noise Figure vs. LNAGAIN plots in the Typical Operating

Characteristics for more information.

The downconverter is implemented using an image-

reject mixer consisting of an input buffer with two out-

puts, each of which is fed to a double-balanced mixer.

A quadrature LO drives the local-oscillator (LO) port of

Table 1. LNA Modes

LNAGAIN

VOLTAGE (V)

0 < VLNAGAIN ≤ 0.5

MODE

LNA capacitively bypassed,

minimum gain, maximum IP3

0.5 < VLNAGAIN < 1.0

1.0 < VLNAGAIN ≤ 1.5

1.5 < VLNAGAIN ≤ VCC

LNA partially biased. Avoid this

mode— the LNA operates in a

Class C manner

LNA gain is monotonically

adjustable

LNA at maximum gain

(remains monotonic)

MAX2424

MAX2426

TXIN

1.5µA

2M VMIXER INPUT

TXIN

1.5µA

Figure 2. TXIN, TXIN Equivalent Circuit

each mixer. An on-chip oscillator and an external tank

circuit generates the LO. Its signal is buffered and split

into two phase shifters, which provide 90° of phase shift

across their outputs. This pair of LO signals is fed to the

mixers. The mixers’ outputs then pass through a sec-

ond pair of phase shifters, which provide a 90° phase

shift across their outputs. The resulting mixer outputs are

then summed together. The final phase relationship is

such that the desired signal is reinforced and the image

signal is canceled. The downconverter mixer output

appears on the RXOUT pin, a single-ended 330Ω output.

Transmitter

The MAX2424/MAX2426 transmitter consists of a bal-

anced mixer and a PA driver amplifier. The mixer inputs

are accessible via the TXIN and TXIN pins. An equiva-

lent circuit for the TXIN and TXIN pins is shown in

Figure 2. Because TXIN and TXIN are linearly coupled

to the mixer stage, they can accept spectrally shaped

input signals. Typically, the mixer can be used to multi-

ply the LO with a baseband signal, generating BPSK or

ASK modulation. Transmit upconversion can also be

implemented by applying a modulated IF signal to

these inputs. For applications requiring image rejection

on the transmitter, refer to the MAX2420/MAX2421/

MAX2422/MAX2460/MAX2463 data sheet.

Set the common-mode voltage at TXIN, TXIN to 2.3V by

selecting appropriate values for RA and RB (Figure 1). The

total series impedance of RA and RB should be approxi-

mately 100kΩ.

Frequency modulation (FM) is realized by modulating

the VCO tuning voltage. Apply the appropriate differen-

tial and common-mode voltages to TXIN and TXIN to

control transmitter output power (Figure 3).

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