MB39A107 查看數據表（PDF） - Fujitsu
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产品描述 (功能)
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MB39A107 Datasheet PDF : 45 Pages
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MB39A107
s PIN DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
VCC
+ INUV
OUTC1
− INC1
+ INC1
IOFA1
+ INE1
− INE1
FB1
OUTC2
− INC2
+ INC2
+ INE2
− INE2
FB23
− INE3
17
OUTD
18
CS
19
RT
20
VREF
21
GND
22
CTL-1
23
CTL-2
24
OUT-CP
25
PGND
26
OUT-2
27
VS
28
OUT-1
29
CB
30
VB
I/O
Descriptions
Reference voltage, control circuit power supply terminal
I Low input voltage detection comparater (UV Comp.) input terminal
O Current detection amplifier (Current Amp1) output terminal
I Current detection amplifier (Current Amp1) input terminal
I Current detection amplifier (Current Amp1) input terminal
I Current detection amplifier (Current Amp1) offset voltage input terminal
I Error amplifier (Error Amp1) non-inverted input terminal
I Error amplifier (Error Amp1) inverted input terminal
O Error amplifier (Error Amp1) output terminal
O Current detection amplifier (Current Amp2) output terminal
I Current detection amplifier (Current Amp2) input terminal
I Current detection amplifier (Current Amp2) input terminal
I Error amplifier (Error Amp2) non-inverted input terminal
I Error amplifier (Error Amp2) inverted input terminal
O Error amplifier (Error Amp2, 3) output terminal
I Error amplifier (Error Amp3) inverted input terminal
With IC in standby mode, this terminal is set to Hi-Z to prevent loss of
O current through output voltage setting resistance.
Set CTL terminal to “H” level to output “L” level.
Soft-start capacitor connection terminal
Triangular waveform oscillation frequency setting resistor connection
terminal
O Reference voltage output terminal
Ground terminal
I DC/DC converter block power supply control terminal
I Current detection amplifier (Current Amp1) power supply control terminal
O External main-side FET charge pump output terminal for driving gate
Ground teriminal
O External synchronous rectification-side FET output terminal for driving gate
External main-side FET source connection terminal
O External main-side FET output terminal for driving gate
This terminal generates a voltage of “VCC + about 5 V” with a capacitor and
an SBD connected to the OUT-CP, VB, and CB terminals.
O Output circuit bias output terminal
4
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