MB39A112 查看數據表（PDF） - Fujitsu

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MB39A112

3-ch DC/DC Converter IC

Fujitsu 

MB39A112

s BLOCK DIAGRAM

−INE1 2

VREF

10 µA

CS1 1

FB1 3

L

priority

Threshold voltage

1.0 V ± 1%

Error

− Amp1

++

1.0 V

PWM

Comp.1

+

−

CH1

Drive1

Pch

IO = 150 mA

20 VCCO

19 OUT1

−INE2 9

VREF

10 µA

CS2 10

FB2 8

L

priority

Threshold voltage

1.23 V ± 1%

Error

− Amp2

++

1.23 V

PWM

Comp.2

+

−

CH2

Drive2

Pch

IO = 150 mA

18 OUT2

−INE3 12

VREF

10 µA

CS3 11

Threshold voltage

1.23 V ± 1%

Error

− Amp3

++

FB3 13

L

priority

1.23 V

H

priority

SCP

Comp. +++

−

2.7 V

CSCP 14

SCP

2.5 V

2.0 V

H: at SCP

H: UVLO release

OSC

UVLO

PWM

Comp.3

+

−

CH3

Drive3

Pch

IO = 150 mA

VCCO − 5 V

Bias

Voltage

VH

Error Amp Power Supply

SCP Comp. Power Supply

bias

3.5 V

ErrorAmp Reference

1.0 V/1.23 V

VREF

Power

VR ON/OFF

CTL

GND

5

6

RT CT

7

GND

17 OUT3

16 VH

15 GNDO

4 VCC

4

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