MB90233 查看數據表（PDF） - Fujitsu
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产品描述 (功能)
比赛名单
MB90233 Datasheet PDF : 83 Pages
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MB90230 Series
(Continued)
Pin no.
70
Pin name
P50
CLK
71
P51
RDY
72
P52
HAK
73
P53
HRQ
74
P54
WRH
75
RST
76
P55
WRL
77
P56
RD
78
P57
79
VSS
Circuit
type
Function
H This pin is enabled in the single-chip mode and when the CLK output
is disabled.
CLK output pin
This pin is enabled in an external-bus enabled mode with the CLK
output enabled.
F General-purpose I/O port
This port is enabled in the single-chip mode.
Ready signal input pin
This pin is enabled in an external-bus enabled mode.
E General-purpose I/O port
This port is enabled in the single-chip mode or when the hold function
is disabled.
Hold acknowledge signal output pin
This pin is enabled in the single-chip mode or when the hold function
is enabled.
E General-purpose I/O port
This port is enabled in the single-chip mode or when the hold function
is disabled.
Hold acknowledge signal output pin
This pin is enabled in the single-chip mode or when the hold function
is enabled.
E General-purpose I/O port
This port is enabled in the single-chip mode, in external-bus 8-bit
mode, or when the WR pin output is disabled.
Write strobe output pin for the upper eight bits of the data bus
This pin is enabled in an external-bus enabled mode and in external
bus 16-bit mode with the WR pin output enabled.
B Reset signal input pin
E This port is enabled in the single-chip mode, in external-bus 8-bit
mode, or when the WR pin output is disabled
Write strobe output pin for the lower eight bits of the data bus
This pin is enabled in an external-bus enabled mode and in external
bus 16-bit mode with the WR pin output enabled.
The pin is a general-purpose I/O port.
E This pin is enabled in the single-chip mode.
Read strobe output pin for the data bus
This pin is enabled in an external-bus enabled mode.
E General-purpose I/O port
— Power pin (GND)
*1: Enabled in any standby mode
*2: Enabled only in the hardware standby mode
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