MB90234PFV 查看數據表（PDF） - Fujitsu

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产品描述 (功能)

比赛名单

MB90234PFV

16-bit Proprietary Microcontroller

Fujitsu 

MB90230 Series

s PIN DESCRIPTION

Pin no.

80

81

82

83 to 90

Pin name

X0

X1

VCC

P00 to P07

D00 to D07

91 to 98 P10 to P17

D08 to D15

99, 100 P20 to P27

1 to 6

A00 to A07

7, 8

P30, P31

A08, A09

9

10 to 15

VSS

P32 to P37

A10 to A15

Circuit

type

A Oscillator pins

Function

— Power supply pin

G General-purpose I/O port

An input pull-up resistor can be added to the port by setting the

pull-up resistor setting register.

These pins serve as D00 to D07 pins in bus modes other than the

single-chip mode.

I/O pins for the lower eight bits of the external data bus.

These pins are enabled in an external-bus enabled mode.

G General-purpose I/O port

An input pull-up resistor can be added to the port by setting the pull-up

resistor setting register.

These pins are enabled in the single-chip mode with the external-bus

enabled and the 8-bit data bus specified.

I/O pins for the upper eight bits of the external data bus

These pins are enabled in an external-bus enabled mode with the 16-

bit data bus specified.

G General-purpose I/O port

An input pull-up resistor can be added to the port by setting the

pull-up resistor setting register.

These pins are enabled in the single-chip mode.

I/O pins for the lower eight bits of the external data bus

These pins are enabled in an external-bus enabled mode.

E General-purpose I/O port

This port is enabled in the single-chip mode or when the middle

address control register setting is “port.”

I/O pins for the middle eight bits of the external data bus

These pins are enabled in an external-bus enabled mode when the

middle address control register setting is “address.”

— Power supply pin

E General-purpose I/O port

This port is enabled in the single-chip mode or when the middle

address control register setting is “port.”

I/O pins for the middle eight bits of the external data bus

These pins are enabled in an external-bus enabled mode when the

middle address control register setting is “address.”

(Continued)

5

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