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MC13760 查看數據表(PDF) - Motorola => Freescale

零件编号
产品描述 (功能)
比赛名单
MC13760
Motorola
Motorola => Freescale Motorola
MC13760 Datasheet PDF : 6 Pages
1 2 3 4 5 6
MC13760
Figure 1. MC13760 Detailed Block Diagram
AGC Control
SPI
Control
On Channel
AGC Det.
RFA0
PRAVCC1
PREINI
PREINIB
PRAGND
PRAVCC2
PREINGB
PREING
PRAGNDDIG
Step
Alternator
Control
Step
Atten
Step
Atten
AGC
Warp
AGC
Amp
DCOCL
I
On Channel
AGC Det.
1 Pole
Q
1 Pole
2 Pole
2 Pole
2 Pole
2 Pole
2 Pole
2 Pole
LOIN
DCLQCP
DCLQCIN
REFVCC
TCAPP
TCAPM
CREF
REFGND
PRSCIN
VCOCT2
VCOCT1
XTALWARP
Third Order
Passive Filter OSCVCC
OSCGND
26 MHz
XTALBASE
XTALEMIT
CPGITR
ADAPT
CPGT
MNCPGND
TBD Order
Passive Filter MNCPGND
MAINVCC
MAINGND
AOCDRIVE
+2 Quadrature
Generator
DCOCL
Tracking Loop &
BB Filter BW Control
Adapt
Timing
SPII
Internal
Reference
& Bias
Programmable
Divider
26 MHz
Recombination
6
Logic
SPICLK
CEX
8
24
Accumulator #1
Accumulator #2
Battery
Save
DIG_AFC
Enable
24 Bit
Adder
Fine Channel
24
AFC_SEL
Battery
Save
32
16 LSB TX DATA Buffer
Look–Up
DO
Start
ROM
Clk
Adapt
SPI
6 Bit Control
D/A
Accumulator #3
2
4.333 MHz
B6
B D Q
dk
16
SPI
9 Bit Control
D/A
Phase
Detector
2
Startup
2
26 MHz
Reference
Oscillator
4
4
+13/ +17/
+26/ +34
+65/ +84/
+130/ +168
PtC 200 kHz
24
Accumulator #1
Dual Mode
Charge Pump
+10/
+26
+1/
+2
Recombination
86
Logic
Accumulator #2
Wideb and
Charge Pump
PtA PtB Programmable
Divider
Accumulator #3
CLKGENIN
MUX
+7/
+14/
+21/
From
PtD
+28
From TXE/
6 Bit
D/A
6
6 Bit
Reg
6
8X6
Cosine
Lookup
3 Bit PtC TXKEY
3 Counter
8 Bit
D/A
8
8 Bit
Reg
8
8 Bit
Counter 8
SPI
REG
5 Bit 5 Bit
D/A 5 Reg
5
Control
Logic
16
6
Super Filter
3
From
MUX
PtD
PtA
From
PtA
8
400 KHz
Reference
2
+N
Phase Detector/
Charge Pump
13.0 – 16.8 MHz or
3
+1/+2/
26.0 – 33.6 MHz
+3/+4
5
MUX
From PtB
Test
Multiplex
(2 Outputs)
S/H
S/H
S/H
AGCI
3:1 Input Mux
10 Bit, or 8 Bit
Cyclic A/D
Receive
Data Register
Comb
Filter
Comb
Filter
8 Bit
8 Bit
D/A
D/A
Sw. Cap Sw. Cap
Filter
Filter
Cont.
Cont.
Time
Time
Filter
Filter
Transmit
Data Register
Clock
Generation &
Control Logic
13.0 or 16.8 MHz
IREF
Clock
Gen.
1.0, 2.4 or 2.6 MHz
CLKGENIN
+1/
+2/
+3/
+4
IREF
From
PtD
SPII
8 Bit
D/A
SPICLK
CEX
Output
Enable
D or A
Mixer & Preamp
Current
22
IF
49 Control
62 Channel 62
62
AFC
NVCC
NGND
QVCC
QGND
SERIALVCC
SERIALGND
SRD
RXACQ
STD
TXCLK/SCK
RSTB
TXE/TXKEY
RXCLK
RXFS/SFS
TSLOT
TSLOTB
TCLK
TCLKB
OUTI
OUTIB
OUTQ
OUTQB
DMCS
VBLIN
ASW
VCNTO
SPII
SPICLK
CEX
Tark
Loop
Circuit Filter
2
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS – RF AND IF DEVICE DATA

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