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MC14513BCP
(Rev.:2000)

BCD-To-Seven Segment Latch/Decoder/Driver

ON Semiconductor 

MC14513B

20 ns

INPUT C

tPLH

OUTPUT g

tTLH

90%

50%

10%

tPHL

tTHL

20 ns

VDD

VSS

VOH

VOL

a. Data Propagation Delay: Inputs RBI, D and LE low, and Inputs A, B, BI and LT high.

20 ns

INPUT C

tPLH

OUTPUT RBO

tTLH

90%

50%

10%

tPHL

90%

50%

10%

tTHL

20 ns

VDD

VSS

VOH

VOL

b. Inputs A, B, D and LE low, and Inputs RBI, BI and LT high.

20 ns

90%

VDD

LE

50%

10%

th

VSS

tsu

VDD

INPUT C

50%

VSS

VOH

OUTPUT g

VOL

c. Setup and Hold Times: Input RBI and D low, Inputs A, B, BI and LT high.

20 ns

90%

50%

LE

10%

tWL(LE)

20 ns

VDD

VSS

d. Pulse Width: Data DCBA strobed into latches.

Figure 2. Dynamic Signal Waveforms

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