MCM6709BJ10 查看數據表（PDF） - Motorola => Freescale
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MCM6709BJ10 Datasheet PDF : 7 Pages
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WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
MCM6709B–8 MCM6709B–10 MCM6709B–12
Parameter
Symbol Min
Max
Min
Max
Min
Max Unit Notes
Write Cycle Time
tAVAV
8
—
10
—
12
—
ns
3
Address Setup Time
tAVWL
0
—
0
—
0
—
ns
Address Valid to End of Write
tAVWH
8
—
9
—
10
—
ns
Write Pulse Width
tWLWH
8
—
9
—
10
—
ns
tWLEH
Data Valid to End of Write
tDVWH
4
—
5
—
6
—
ns
Data Hold Time
tWHDX
0
—
0
—
0
—
ns
Write Low to Data High–Z
tWLQZ
—
4
—
5
—
6
ns 4, 5, 6
Write High to Output Active
tWHQX
3
—
3
—
3
—
ns 4, 5, 6
Write Recovery Time
tWHAX
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. All write cycle timing is referenced from the last valid address to the first transitioning address.
4. Transition is measured 200 mV from steady state voltage with load of Figure 1b.
5. This parameter is sampled and not 100% tested.
6. At any given voltage and temperature, tWLQZ max is less than tWHQX min both for a given device and from device to device.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1
tAVAV
tAVWL
HIGH–Z
tAVWH
tWLQZ
tWLWH
tWLEH
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MOTOROLA FAST SRAM
MCM6709B
5
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