MD80C88B(2008) 查看數據表（PDF） - Intersil

零件编号

产品描述 (功能)

比赛名单

MD80C88B
(Rev.:2008)

CMOS 8-/16-Bit Microprocessor

Intersil 

Instruction Set Summary (Continued)

MNEMONIC AND

DESCRIPTION

Immediate with Accumu-

lator

AAS = ASCll Adjust for

Subtract

DAS = Decimal Adjust for

Subtract

MUL = Multiply (Un-

signed)

IMUL = Integer Multiply

(Signed)

AAM = ASCll Adjust for

Multiply

DlV = Divide (Unsigned)

IDlV = Integer Divide

(Signed)

AAD = ASClI Adjust for

Divide

CBW = Convert Byte to

Word

CWD = Convert Word to

Double Word

LOGIC

NOT = Invert

SHL/SAL = Shift Logi-

cal/Arithmetic Left

SHR = Shift Logical Right

SAR = Shift Arithmetic

Right

ROL = Rotate Left

ROR = Rotate Right

RCL = Rotate Through

Carry Flag Left

RCR = Rotate Through

Carry Right

AND = And:

Reg./Memory and Regis-

ter to Either

Immediate to Regis-

ter/Memory

Immediate to Accumula-

tor

TEST = And Function to

Flags, No Result:

Register/Memory and

Register

Immediate Data and Reg-

ister/Memory

76543210

0011110w

00111111

00101111

1111011w

1111011w

11010100

1111011w

1111011w

11010101

10011000

10011001

1111011w

110100vw

110100vw

110100vw

110100vw

110100vw

110100vw

110100vw

0010000dw

1000000w

0010010w

1000010w

1111011w

31

80C88

INSTRUCTION CODE

76543210

76543210

data

data if w = 1

76543210

mod 1 0 0 r/m

mod 1 0 1 r/m

00001010

mod 1 1 0 r/m

mod 1 1 1 r/m

00001010

mod 0 1 0 r/m

mod 1 0 0 r/m

mod 1 0 1 r/m

mod 1 1 1 r/m

mod 0 0 0 r/m

mod 0 0 1 r/m

mod 0 1 0 r/m

mod 0 1 1 r/m

mod reg r/m

mod 1 0 0 r/m

data

mod reg r/m

mod 0 0 0 r/m

data

data if w = 1

data if w = 1

data

data if w = 1

FN2949.4

February 22, 2008

Share Link: