MIC74(2000) 查看數據表（PDF） - Micrel
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MIC74 Datasheet PDF : 20 Pages
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MIC74
Register Descriptions
Micrel
Device Configuration Register
DEV_CFG
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
Always write as zero.
FAN IE
Power-On Default Value: 0000 0000b, 00h
Interrupts disabled
Not in Fan Mode
Command_byte addess: 0000 0000b, 00h
Type:
8-bits, read/write
Bit Name: IE
Function: Global interrupt enable.
Operation: 1 = enabled
0 = disabled
Bit Name: FAN
Function: Selects Fan Mode
(P[7:4] vs. /FS[2:0], /SHDN)
Operation: 1 = Fan Mode
0 = I/O Mode
Output Configuration Register
OUT_CFG
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0
Power-On Default Value: 0000 0000b, 00h
all outputs open-drain
Command_byte addess: 0000 0010b, 02h
Type:
8-bits, read/write
Bit Name: OUTn
Function: Selects output driver configuration of Pn when
Pn is configured as an output.
Operation: 1 = push-pull
0 = open-drain
Notes:
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain
outputs. They are then referred to as /FS[2:0]
and /SHDN. The OUT_CFG register has no
effect on these I/O bits while in Fan Mode.
Bit Name: D[2] through D[6]
Function: Reserved
Operation: Reserved—always write as zero
Data Direction Register
D[7]
DIR7
D[6]
DIR6
D[5]
DIR5
DIR
D[4] D[3]
DIR4 DIR3
D[2]
DIR2
D[1]
DIR1
D[0]
DIR0
Power-On Default Value: 0000 0000b, 00h
all Pn’s configured as inputs
Command_byte addess: 0000 0001b, 01h
Type:
8-bits, read/write
Status Register
STATUS
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
S7 S6 S5 S4 S3 S2 S1 S0
Power-On Default Value: 0000 0000b, 00h
no interrupts pending
Command_byte addess: 0000 0011b, 03h
Type:
8-bits, read only
Bit Name: DIRn
Function: Selects data direction, input or output, of Pn
Operation: 1 = output
0 = input
Notes:
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain
outputs. They are then referred to as /FS[2:0]
and /SHDN. The DIR register has no effect on
these I/O bits while in Fan Mode.
Bit Name: Sn
Function: Flag for Pn input-change event when Pn is
configured as an input; Sn is set when the
corresponding input changes state.
Operation: 1 = change occured
0 = no change occured
Notes:
If Fan Mode is selected, that is, the FAN bit of
the DEV_CFG register is set to one, P[7:4] are
automatically configured as open-drain
outputs. They are then referred to as /FS[2:0]
and /SHDN. No interrupts of any kind are
generated by these pins while in Fan Mode.
All status bits are cleared after any read
operation is performed on STATUS.
August 1, 2000
5
MIC74
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