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MIC74 查看數據表(PDF) - Micrel

零件编号
产品描述 (功能)
比赛名单
MIC74 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Micrel, Inc.
Pin Configuration
A0 1
A1 2
A2 3
P0 4
P1 5
P2 6
P3 7
GND 8
16 VDD
15 DATA
14 CLK
13 /ALERT
12 P7 (/FS2)
11 P6 (/FS1)
10 P5 (/FS0)
9 P4 (/SHDN0)
16-Pin QSOP (QS)
MIC74
Pin Description
Pin Number
1–3
4–7
8
9 – 12
13
14
15
16
Pin Name
A0 – A2
P0 – P3
GND
P4 – P7
(/SHDN, /FS0 – FS2)
/ALERT
CLK
DATA
VDD
Pin Function
Address (Input): Slave address selection inputs; sets the three least significant bits of the
MIC74’s slave address.
Parallel I/O (Input/Output): General-purpose I/O pin. Direction and output type are user
programmable.
Ground
Parallel I/O (Input/output): P4–P7 are general-purpose I/O pins. Direction and output type
are user programmable.
Shutdown (Output): When the FAN bit is set, pin 9 becomes SHDN.
Fan Speed (Output): When the FAN bit is set, pins 10 through 12 become /FS0–/FS2
respectively, controlled by the FAN_SPEED register.
Interrupt (Output): Active-low, open-drain output signals input-change-interrupts to the host
on this pin. Signal is cleared when the bus master (host) polls the ARA (alert response
address = 0001 100) or reads status.
Serial Bus Clock (Input): The host provides the serial bit clock in this input.
Serial Data (Input/Output): Serial data input and open-drain serial data output.
Power Supply (Input).
October 2006
2
M9999-101006

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