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MK3724GILF 查看數據表(PDF) - Integrated Circuit Systems

零件编号
产品描述 (功能)
比赛名单
MK3724GILF
ICST
Integrated Circuit Systems ICST
MK3724GILF Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
MK3724
VCXO PLUS AUDIO CLOCK FOR STB
Parameter
Input High Voltage (S1:S0)
Input High Voltage (S2)
Input Low Voltage (S1:S0)
Input Low Voltage (S2)
Input High Current
Input Low Current
Operating Supply Current
Short Circuit Current
VIN, VCXO Control Voltage
On Chip Pull-up Resistor,
inputs
Input Capacitance
Nominal Output Impedance
Symbol Conditions
VIH
VIH
VIL
VIL
IIH at 3.3V, Sx, PDTS
IIL at 0V, Sx, PDTS
IDD No load
IOS
VIA
RPU Input selects
CIN
ZOUT
Input selects
Min.
2.0
2.5
0
Typ.
0.1
-8.5
11
±50
360
5
20
Max.
0.8
0.5
3.3
Units
V
V
V
V
µA
µA
mA
mA
V
k
pF
AC Electrical Characteristics
VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Crystal Pullability
VCXO Gain
fP
0V< VIN < 3.3 V, Note 1
+ 100 + 150
VIN = VDD/2 + 1 V, Note 1
150
ppm
ppm/V
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
tOR 20% to 80%, CL=15 pF
1.2 2.0 ns
tOF 80% to 20%, CL=15 pF
1.2 2.0 ns
tD
Measured at 1.65 V, CL=15
40
50 60
%
pF
Maximum Output Jitter,
short term
tJ
CL=15 pF
+150
ps
Changing Frequency
Setting Time
1
ms
Power-up time
PLL lock time from power-up
up to ±1% of final frequency
10 ms
PDTS goes high until stable
CLK output up to 1% of final
frequency
2
ms
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
MDS 3724 C
6
Revision 121904
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com

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