OKI Semiconductor
FEDL7029-03
ML7029
TIMING DIAGRAM
Transmit Side PCM/ADPCM Data Interface
BCLK
SYNC
tBS
tBS
tWS
tXD1
tXD2
PCMSO
MSB
tSDX
IS
MSB
tSDX
tXD3
LSB
tXD3
LSB
Receive Side PCM/ADPCM Data Interface
BCLK
tBS
tBS
tWS
SYNC
tRD1
tRD2
PCMRO
IR
MSB
tSDR
tDS
tDH
MSB
tRD3
LSB
tRD3
LSB
Figure 3-1 PCM/ADPCM Data Interface (Continuous BCLK)
13/29