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MM74HC251 查看數據表(PDF) - Fairchild Semiconductor

零件编号
产品描述 (功能)
比赛名单
MM74HC251
Fairchild
Fairchild Semiconductor Fairchild
MM74HC251 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns
Symbol
Parameter
Conditions
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPZH, tPZL
tPZH, tPZL
tPHZ, tPLZ
tPHZ, tPLZ
Maximum Propagation Delay
A, B or C to Y
Maximum Propagation
Delay, A, B or C to W
Maximum Propagation
Delay, Any D to Y
Maximum Propagation
Delay, Any D to W
Maximum Output Enable
Time, W Output
Maximum Output Enable
Time, Y Output
Maximum Output Disable Time
W Output
Maximum Output Disable Time
Y Output
RL = 1 k
CL = 50 pF
RL = 1 k
CL = 50 pF
RL = 1 k
CL = 5 pF
RL = 1 k
CL = 5 pF
Guaranteed
Typ
Units
Limit
26
35
ns
27
35
ns
22
29
ns
24
32
ns
19
27
ns
19
26
ns
26
40
ns
27
35
ns
AC Electrical Characteristics
CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Symbol
Parameter
Conditions VCC
TA = 25°C
Typ
TA = −40 to 85°C TA = −55 to 125°C Units
Guaranteed Limits
tPHL, tPLH Maximum Propagation Delay
A, B or C to Y
2.0V
90
205
256
4.5V
31
41
51
300
ns
60
ns
6.0V
26
35
44
51
ns
tPHL, tPLH Maximum Propagation
Delay, A, B or C to W
2.0V
95
205
256
4.5V
32
41
51
300
ns
60
ns
6.0V
27
35
44
51
ns
tPHL, tPLH Maximum Propagation
Delay, any D to Y
2.0V
70
195
244
4.5V
27
39
49
283
ns
57
ns
6.0V
23
33
41
48
ns
tPHL, tPLH Maximum Propagation
Delay, any D to W
2.0V
75
185
231
4.5V
29
37
46
268
ns
54
ns
6.0V
25
32
40
46
ns
tPZH, tPZL Maximum Output Enable Time
RL = 1 k
2.0V
45
150
188
W Output
4.5V
21
30
38
218
ns
44
ns
6.0V
18
26
33
38
ns
tPZH, tPZL Maximum Output Enable Time
RL = 1 k
2.0V
45
145
181
Y Output
4.5V
21
29
36
210
ns
42
ns
6.0V
18
25
31
36
ns
tPHZ, tPLZ Maximum Output Disable Time
RL = 1 k
2.0V
60
220
275
W Output
4.5V
29
44
55
319
ns
64
ns
6.0V
25
37
46
54
ns
tPHZ, tPLZ Maximum Output Disable Time
RL = 1 k
2.0V
60
195
244
Y Output
4.5V
30
39
49
283
ns
57
ns
6.0V
26
33
41
48
ns
tTHL, tTLH Maximum Output Rise
and Fall Time
2.0V
30
75
95
4.5V
8
15
19
110
ns
22
ns
6.0V
7
13
16
19
ns
CPD
Power Dissipation Capacitance (Note 5) (per package)
110
pF
CIN
Maximum Input Capacitance
5
10
10
10
pF
Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption,
IS = CPDVCCf + ICC.
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