FEDR27V3252J-01-02 查看數據表（PDF） - Oki Electric Industry

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FEDR27V3252J-01-02

2M–Word × 16–Bit or 4M–Word × 8–Bit Page Mode OTP

Oki Electric Industry 

OKI Semiconductor

FEDR27V3252J-01-02

MR27V3252J / OTP

Programming Flow Chart

Start

Address = First Location

VCC = 4.0 V

VPP = 8.2 V

Program 10 µs

NO

Increment Address

Last Address?

YES

Address = First Location

VCC = 4.0 V/VPP = 4.0V

NG

Read(One Word)

NO

Increment Address

PASS

Last Address?

YES

Address = First Location

VCC = 2.7 V/VPP = 2.7V

NG

Read(One Word)

NO

Increment Address

PASS

Last Address?

YES

Device Passed

Device Failed

9/12

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