HT6221 查看數據表（PDF） - Holtek Semiconductor
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HT6221 Datasheet PDF : 15 Pages
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HT6221/HT6222
The transmission codes employ the PPM (Pulse Position Modulation) method to represent their two logic states by ²0²
(1.12ms) and ²1² (2.24ms) as shown in Timing 3:
"Z e ro "
0 .5 6 m s
"O n e "
3 8 k H z c a r r ie r
d a ta p e r io d ( 1 .1 2 m s )
d a ta p e r io d ( 2 .2 4 m s )
3 8 k H z c a r r ie r
Logic states
· Setting the address codes (A0~A15)
The algorithm rule of the address codes (A0~A15) can
be selected by mask option.
In this case, the 16-bit on-chip MASK ROM (ROM1
and ROM2) are available, and the value of ROM1 (8
bits) and ROM2 (8 bits) are decided by one MASK
LAYER. The current value of ROM1 and ROM2 are
both ²00H². The A0~A7 are set by logical OR between
the external switch S0~S7 and the ROM1. The
A8~A15 equal some bits inverted to A0~A7, the inver-
sion are decided by Logical OR between the external
switch S8~S15 and the ROM2.
For example:
The following is an illustration of these rules in selecting
the address codes (A0~A15).
A IN
C1
H T 6 2 2 1 /H T 6 2 2 2
C2
C3
C4
C5
C6
C7
C8
200kW ´8
S8
S9
S 10
S 11
S 12
S 13
S 14
S 15
1N 4148 ´ 8
S0
S1
S2
S3
S4
S5
S6
S7
( S w itc h O p e n : 0 , S w itc h C lo s e : 1 )
E x te r n a l S w itc h S 0 ~ S 1 5 : 1 0 0 0 1 1 0 0 1 0 1 0 0 1 0 0
O n - c h ip R O M 1 , R O M 2 : 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
b it0
b it7 b it0
b it7
S 0~S 7 O R R O M 1
A 0~A 7: 1 0 0 0 1 1 0 0
A 8 '~ A 1 5 ':
A0 A1 A2 A3 A4 A5 A6 A7
A 8~A 15: 1 1 0 1 0 1 1 1
S 8~S 15 O R R O M 2
10100100
C o m p le m e n t
1 : n o n in v e r s io n
0 : in v e r s io n
Rev. 1.50
6
October 1, 2007
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