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MSM587 查看數據表(PDF) - Oki Electric Industry

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MSM587 Datasheet PDF : 24 Pages
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¡ Semiconductor
MSM66585/586/587/P587/Q587
PIN DESCRIPTIONS (Continued)
Symbol
P9_0P9_3/
A16-A19
P9_4-P9_7
P10_0-P10_7
P12_0-P12_1
P12_2-P12_3/
INT2-INT3
P12_4-P12_7
AI0-AI3
VREF
AGND
OSC0
OSC1
NMI
RES
EA
VDD
GND
Type
I/O
Description
Port 9 is 8 input/output pins. Input or output can be specified for each bit with the
Port 9 Mode Register (P9IO). Pull-up resistors can be specified for each bit with the
Port 9 Pull-Up Register (P9PUP).
P9_0-P9_3 also have a secondary function as output pins for internal operation.
Their secondary function can be set for each bit with the Port 9 Secondary Function
Control Register (P9SF). The input/output settings of P9IO will be ignored for pins
that have been set to the secondary function by P9SF.
A16-A19 (P9_0-P9_3):
These pins function as output pins for address A16-A19 when accessing program
memory or data memory that has been expanded externally. Note that program
memory address A16-A19 will be output even when accessing data memory that has
been expanded externally. When the EA pin is low and program memory that has
been expanded externally is accessed, A16-A19 will be output regardless of P9SF
settings.
After reset (by RES signal input, BRK instruction execution, or op code trap), P9 will
be high-impedance inputs.
Port 10 is 8 input/output pins. Input or output can be specified for each bit with the
Port 10 Mode Register (P10IO). Pull-up resistors can be specified for each bit with
I/O the Port 10 Pull-Up Register (P10PUP).
After reset (by RES signal input, BRK instruction execution, or op code trap), P10 will
be high-impedance inputs.
Port 12 is 8 input/output pins. Input or output can be specified for each bit with the
Port 12 Mode Register (P12IO).
P12_2 and P12_3 also have a secondary function as input pins for internal operation.
Their secondary function can be set for each bit with the Port 12 Secondary Function
I/O
Control Register (P12SF). The input/output settings of P12IO will be ignored for pins
that have been set to the secondary function by P12SF.
INT2 (P12_2), INT3 (P12_3):
These pins input external interrupts 2 and 3.
After reset (by RES signal input, BRK instruction execution, or op code trap), P12 will
be high-impedance inputs.
I These are analog input pins for the A/D converter (test pins for MSM66585).
I This is the reference voltage pin for the A/D converter (VDD for MSM66585).
I This is the ground input pin for the A/D converter (GND for MSM66585).
I This pins connect to a crystal oscillator, ceramic oscillator, or capacitors for base clock
oscillation. When the base clock is to be supplied externally, it should be input on the
O OSC0 pin with the OSC1 pin left open.
I This input pin requests a non-maskable interrupt.
I This is an active-low reset input pin.
When this pin is high, program addresses 0H-FFFFH will access internal program
memory and program addresses 10000H-FFFFFH will access external program memory.
I To access external program memory, P1, P5, and P9 must be set with their secondary
function control registers.
When this pin is low, all program addresses will access external program memory.
I
These are voltage pins. All VDD pins (9, 17, 37, 67, 93) should be connected to the
supply voltage (for MSM66585 connect pins 9, 10, 17, 37, 67, 93).
I These are ground pins. All GND pins (16, 40, 68, 94) should be connected to ground
(for MSM66585 connect pins 11, 16, 40, 68, 94).
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