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MSM6786GS-2K 查看數據表(PDF) - Oki Electric Industry

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MSM6786GS-2K Datasheet PDF : 17 Pages
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¡ Semiconductor
FEDL6786-03
MSM6786
Operating Description
Display data input
As shown in the section on data configuration, the data for display consists of data fields that
correspond to segment ON/OFF and command fields which indicate display data input.
Set the bits C0 to C1 of the command field to "0" or "1" according to the common to which the
display data corresponds. To the other four bits, set the display data input commands. LED
display data corresponds to common 1. Data input to the DATA I/O pin is saved in a shift
register at the rising edge of the CLOCK pulse, and is transferred to a data latch for display while
the LOAD pulse is at "H" level, and is then output through a segment driver.
CLOCK
DATAI/O D1 D2 D3 D4
D28 D29 D30 C0 C1 C2 C3 C4 C5
LOAD
Display Output
Old Data
New Data
Key data output
The state of a key switch is indicated by ON = 1, OFF = 0, and is read as 30 bits serial data. (For
information on the sequence, see the section on data configuration.) To output data, the output
command must be written, which causes the data to be output in synchronization with the rising
edge of the CLOCK pulse. By inputting a LOAD pulse after that, the DATA I/O pin returns to
the input state, and the next data or command can be input. (If a LOAD pulse is applied earlier
than the 30th data, the key data is output only by the number of the CLOCK pulse. If CLOCK
pulses more than 30 data bits are applied, 30 data bits of key data are circulated.)
CLOCK
DATAI/O C3 C4 C5
O1 O2 O3
O29 O30
LOAD
Output Command Write
Key Data Read
Next Command
Input
Note1 : The last key data must be read before the LOAD pulse rises.
Note2 : Upon swiching from output mode to input mode, the state of the DATA I/O pin is
unstable for the duration of 300 ns after the rising of LOAD pulse. For this reason, never
input data to the DATA I/O pin during this period.
10/17

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