MSM7602-011GS-2K 查看數據表（PDF） - Oki Electric Industry

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MSM7602-011GS-2K

Echo Canceler

Oki Electric Industry 

¡ Semiconductor

MSM7602

(5/5)

Pin

28-pin 56-pin

SSOP QFP

28 46

— 47

— 48

— 52

— 53

Symbol

MCKO

SF2

OF1

SF1

OF2

Type

Description

O Basic clock (19.2 MHz).

I Parallel data transfer flag.

• Single Chip

Fixed at "H"

• Master Chip in a Cascade Connection

Fixed at "H"

• Slave Chip in a Cascade Connection

Connect OF2 of the master chip to the 1st stage slave chip.

Connect OF1 of the previous stage slave chip to the 2nd and later

stage slave chips.

Refer to the control pin connection example.

O Parallel data transfer flag.

• Single Chip

Leave open.

• Master Chip in a Cascade Connection

Connect to the SF1 of all slaves.

• Slave chip in a Cascade Connection

Connect to the SF2 of the next stage slave chip.

Connect the last stage slave chip to the SF1 of the master chip.

Refer to the control pin connection example.

I Parallel data transfer flag.

• Single Chip

Connect OF2.

• Master Chip in a Cascade Connection

Connect OF1 of the last stage slave chip.

• Slave Chip in a Cascade Connection

Connect OF1 of master chip for all slave chips.

Refer to the control pin connection example.

O Parallel data output flag.

• Single Chip

Connect to SF1.

• Master Chip in a Cascade Connection

Connect to SF2 of the 1st stage slave chip.

• Slave Chip in a Cascade Connection

Leave open.

Refer to the control pin connection example.

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