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Serial Output Timing
MSM7620
fsck. tSCK
tDSC
SCK
tXS
tSX
tCYC
SYNC
tWSY
tSD
tXD
tXD
tXD
SOUT High-Z MSB
LSB High-Z
MSB
ROUT
76 5 4 3 2 1
0
7
Operation Timing After Reset
RST
,, Internal operation
tWR
tDRS
Reset
*Reset timing can be asynchronous
tDIT
tDRE
Initialization
Processing Start
Note: INT is invalid in the diagonally shaded interval.
Power Down Timing
PWDWN
,, Internal Operation
*tDPS
Power Down
tDPE
Processing Start
*Input MCK in the tDPS interval.
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