MSM7717 查看數據表（PDF） - Oki Electric Industry
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MSM7717 Datasheet PDF : 19 Pages
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¡ Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Storage Temperature
Symbol
VDD
VAIN
VDIN
TSTG
Condition
—
—
—
—
MSM7717-01/02/03
Rating
Unit
–0.3 to +7
V
–0.3 to VDD + 0.3
V
–0.3 to VDD + 0.3
V
–55 to +150
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Min. Typ. Max. Unit
Power Supply Voltage
Operating Temperature
VDD Voltage must be fixed
Ta
—
2.7
3.0
3.8
V
–30
+25
+85 °C
Analog Input Voltage
High Level Input Voltage
Low Level Input Voltage
VAIN Connect AIN– and GSX
VIH XSYNC, RSYNC, BCLK,
VIL PCMIN, PDN, ALAW
—
—
1.4
VPP
0.45¥VDD —
VDD
V
0
— 0.16¥VDD V
64, 128, 256, 512, 1024,
Clock Frequency
FC BCLK
2048, 96, 192, 384, 768,
kHz
1536, 1544, 200
Sync Pulse Frequency
FS XSYNC, RSYNC
6.0
8.0
Clock Duty Ratio
DC BCLK
40
50
Digital Input Rise Time
tlr XSYNC, RSYNC, BCLK,
—
—
Digital Input Fall Time
tlf PCMIN, PDN, ALAW
—
—
Transmit Sync Pulse Setting Time
tXS BCLKÆXSYNC, See Fig. 1
tSX XSYNCÆBCLK, See Fig. 1
100
—
100
—
Receive Sync Pulse Setting Time
tRS BCLKÆRSYNC, See Fig. 1
tSR RSYNCÆBCLK, See Fig. 1
100
—
100
—
High Level Sync Pulse Width
tWSH XSYNC, RSYNC, See Fig. 1 1 BCLK —
Low Level Sync Pulse Width
tWSL XSYNC, RSYNC, See Fig. 1 1 BCLK —
PCMIN Setup Time
tDS See Timing Diagram
100
—
PCMIN Hold Time
tDH See Timing Diagram
100
—
Digital Output Load
RDL Pull-up resistor
CDL
—
0.5
—
—
—
Transmit gain stage, Gain = 1 –100
—
Analog Input Allowable DC Offset Voff Transmit gain stage, Gain = 10 –10
—
10 kHz
60
%
50
ns
50
ns
—
ns
—
ns
—
ns
—
ns
—
ms
—
ms
—
ns
—
ns
—
kW
100 pF
+100 mV
+10 mV
Allowable Jitter Width
— XSYNC, RSYNC, BCLK
—
—
1000 ns
9/19
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