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NCP623 查看數據表(PDF) - ON Semiconductor

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NCP623 Datasheet PDF : 16 Pages
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NCP623
NCP623 Wakeup Improvement In portable
applications, an immediate response to an enable signal is
vital. If noise is not a concern, the NCP623 without a bypass
capacitor settles in nearly 20 ms and typically delivers
65 mVRMS between 100 Hz and 100 kHz.
In ultra lownoise systems, the designer needs a 10 nF
bypass capacitor to decrease the noise down to 25 mVRMS
between 100 Hz and 100 kHz. With the addition of the 10 nF
capacitor, the wakeup time expands up to 1.0 ms as shown
on the datasheet curves. If an immediate response is
wanted, Figure 5 provides a solution to charge the bypass
capacitor with the enable signal without degrading the noise
response of the NCP623.
At poweron, C4 is discharged. When the control logic
sends its wakeup signal by going high, the PNP base is
momentarily tied to ground. The PNP switch closes and
immediately charges the bypass capacitor C1 toward its
operating value. After a few ms, the PNP opens and becomes
totally transparent to the regulator.
This circuit improves the response time of the regulator
which drops from 1.0 ms down to 30 ms. The value of C4
needs to be tweaked in order to avoid any bypass capacitor
overload during the wakeup transient.
C4
470 pF
MMBT2902LT1
Q1
C1
10 nF
R2
220 k
On/Off
C3
1.0 mF
+
65 4
NCP623
1 23
Input
Output
C2
+ 1.0 mF
Output
876 5
C2
1.0 mF
+
NCP623
1 23 4
C1
10 nF
MMBT2902LT1
Q1
Input
C3
1.0 mF
+
On/Off
R2
220 k
C4
470 pF
Figure 4. A PNP Transistor Drives the
Bypass Pin when Enable Goes High (DFN6)
Figure 5. A PNP Transistor Drives the
Bypass Pin when Enable Goes High (Micro8)
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