datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

NM24C08U 查看數據表(PDF) - Fairchild Semiconductor

零件编号
产品描述 (功能)
比赛名单
NM24C08U
Fairchild
Fairchild Semiconductor Fairchild
NM24C08U Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Bus Timing
tF
tR
tHIGH
tLOW
tLOW
SCL
SDA
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
tSU:STO
;; IN
tAA
SDA
OUT
tDH
tBUF
DS800009-8
System Layout
Typical System Configuration
VCC
VCC
SDA
SCL
Master
Transmitter/
Receiver
Slave
Receiver
Slave
Transmitter/
Receiver
Master
Transmitter
Note: Due to open drain configuration of SDA, a bus-level pull-up resistor is called for, (typical value = 4.7k)
Example of 16K of Memory on 2-Wire Bus
Note:
The SDA pull-up resistor is required due to the open-drain/open collector output of IIC bus devices.
The SCL pull-up resistor is recommended because of the normal SCL line inactive 'high' state.
It is recommended that the total line capacitance be less than 400pF
Master
Transmitter/
Receiver
VCC
DS800009-20
VCC
SDA
SCL
VCC
NM24C02U/03U
A0 A1 A2 VSS
VCC
NM24C02U/03U
A0 A1 A2 VSS
VCC
NM24C04U/05U
A1 A2 VSS
VCC
NM24C08U/09U
A2 VSS
To VCC or VSS
To VCC or VSS
To VCC or VSS
To VCC or VSS
DS800009-9
Device
NM24C08U/09U
A0
No Connect
Address Pins
A1
No Connect
Memory Size # of Page
A2
Blocks
ADR
8192 Bits
4
6
NM24C08U/09U Rev. B.1
www.fairchildsemi.com

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]