SC7313 查看數據表（PDF） - Silan Microelectronics

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SC7313

DIGITAL CONTROLLED STEREO AUDIO PROCESSOR WITH LOUDNESS

Silan Microelectronics 

Silan

Semiconductors

SC7313

5. ACKNOWLEDGE

The master(microprocessor) puts a resistive HIGH level on the SDA line during the acknowledge clock

pulse(see Figure 19). The peripheral(audioprocessor) that acknowledges has to pull-down(LOW) the SDA line

during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse.

The audioprocessor which has been addressed has to generate an acknowledge after the reception of each

byte , otherwise the SDA line remain at the HIGH level during the ninth clock pulse time. In this case the master

transmitter can generate the STOP information in order to abort the transfer.

SCL

1

2

SDA

start

MSB

3

7

8

9

//

//

Acknowledgment

from receiver

Fig. 19 Acknowledge on the I2C BUS

6. TRANSMISSION WITHOUT ACKNOWLEDGE

Avoiding to detect the acknowledge of the audioprocessor, the microprocessor can use a simpler transmission:

simply it waits one clock without checking the slave acknowledgig, and sends the new data.

This approach of course is less protected from mis-working and decreases the noise immunity.

SOFTWARE SPECIFICATION

1. Interface protocol

The interface protocol comprises:

A start conditions

A chip address byte, containing the SC7313 address(the 8th bit of the bytes must be 0). The SC7313

must always acknowledge at the end of each transmitted byte.

A sequence of data(N-bytes + acknowledge)

A stop condition (P)

SC7313 address

MSB

LSB

MSB

S 1 0 0 0 1 0 0 0 ACK

DATA

LSB MSB

ACK

DATA

LSB

ACK P

ACK: Acknowledge

S: Start

P: Stop

Max clock speed: 100kbits/sec

Data Transferred

(N-Bytes + Acknowledge)

HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD

Rev: 1.1 2002.02.26

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