80C52 查看數據表（PDF） - Philips Electronics

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80C52

80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V/ low power/ high speed 30/33 MHz

Philips Electronics 

Philips Semiconductors

80C51 8-bit microcontroller family

4K/8K/16K/32K ROM/OTP, low voltage (2.7 to 5.5 V),

low power, high speed (30/33 MHz)

Preliminary data

80C3xX2; 80C5xX2;

87C5xX2

FEATURES

• 80C51 Central Processing Unit

– 4 kbytes ROM/EPROM (80/87C51X2)

– 8 kbytes ROM/EPROM (80/87C52X2)

– 16 kbytes ROM/EPROM (80/87C54X2)

– 32 kbytes ROM/EPROM (80/87C58X2)

– 128 byte RAM (80/87C51X2 and 80C31X2)

– 256 byte RAM (80/87C52/54X2/58X2 and 80C32X2)

– Boolean processor

– Fully static operation

– Low voltage (2.7 V to 5.5 V at 16 MHz) operation

• 12-clock operation with selectable 6-clock operation

• Memory addressing capability

– 64 kbytes ROM and 64 kbytes RAM

• Power control modes:

– Clock can be stopped and resumed

– Idle mode

– Power-down mode

• CMOS and TTL compatible

• Two speed ranges at VCC = 5 V

– 0 to 30 MHz with 6-clock operation

– 0 to 33 MHz with 12-clock operation

• PLCC or DIP package (LQFP available soon)

• Extended temperature ranges

• Dual Data Pointers

• Security bits:

– ROM (2 bits)

– OTP (3 bits)

• Encryption array - 64 bytes

• 4 interrupt priority levels

• 6 interrupt sources

• Four 8-bit I/O ports

• Full-duplex enhanced UART

– Framing error detection

– Automatic address recognition

• Three 16-bit timers/counters T0, T1 (standard 80C51) and

additional T2 (capture and compare)

• Programmable clock-out

• Asynchronous port reset

• Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock

mode)

• Wake-up from Power Down by an external interrupt.

2001 Sep 24

3

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