Philips Semiconductors
Dual 5-bit multiplexed 1-bit latched
I2C EEPROM DIP switch
Product data
PCA9560
SAC CHARACTERISTICS
SYMBOL
PARAMETER
MUX_IN ⇒ MUX_OUT
tPLH
LOW-to-HIGH transition time
tPHL
HIGH-to-LOW transition time
Select ⇒ MUX_OUT
tPLH
LOW-to-HIGH transition time
tPHL
HIGH-to-LOW transition time
tR
Output rise time
tF
Output fall time
CL
Test load capacitance on outputs
Select ⇒ NON-MUXED_OUT
tPLH
LOW-to-HIGH transition time
tPHL
HIGH-to-LOW transition time
MIN.
—
—
—
—
1.0
1.0
—
—
—
LIMITS
TYP.
28
8
30
10
—
—
—
30
9
MAX.
40
15
43
15
3
3
50
40
15
AC SPECIFICATIONS
SYMBOL
fSCL
tBUF
tHD;STA
tSU;STA
tSU;STO
tHD;DAT
tVD;ACK
tVD;DAT
tSU;DAT
tLOW
tHIGH
tF
tR
tSP
PARAMETER
Operating frequency
Bus free time between STOP and START conditions
Hold time after (repeated) START condition
Repeated START condition setup time
Set-up time for STOP condition
Data in hold time
Valid time for ACK condition2
Data out valid time3
Data set-up time
Clock LOW period
Clock HIGH period
Clock/Data fall time
Clock/Data rise time
Pulse width of spikes that must be suppressed by the
input filters
STANDARD MODE
I2C-BUS
MIN
MAX
0
100
4.7
—
4.0
—
4.7
—
4.0
—
0
—
0.3
3.45
300
—
250
—
4.7
—
4.0
—
—
300
—
1000
—
50
NOTES:
1. Cb = total capacitance of one bus line in pF.
2. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
3. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
FAST MODE
I2C-BUS
MIN
MAX
0
400
1.3
—
0.6
—
0.6
—
0.6
—
0
—
0.1
0.9
50
—
100
—
1.3
—
0.6
—
20 + 0.1 Cb1
300
20 + 0.1 Cb1
300
—
50
UNIT
ns
ns
ns
ns
ns/V
ns/V
pF
ns
ns
UNITS
kHz
µs
µs
µs
µs
ns
µs
ns
ns
µs
µs
ns
ns
ns
2003 Jun 27
12