PDI1394L40 查看數據表（PDF） - Philips Electronics
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PDI1394L40 Datasheet PDF : 80 Pages
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Philips Semiconductors
1394 enhanced AV link layer controller
Preliminary specification
PDI1394L40
13.5.1.5 Isochronous Receiver FIFO Size (IRXSIZE) – Indirect Address: 0x120
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
base_fifo
010000
Reset Value 0x0000101F
Bit 31..14
R/W Unused bits read ‘0’
Bit 13..8
R/W base_fifo: Base address of the FIFO
Bit 7, 6
R/W Unused bits read ‘0’
Bit 5..0
R/W end_fifo: End address of the FIFO
13.5.1.6 Isochronous Transmitter FIFO Size (ITXSIZE) – Indirect Address: 0x130
end_fifo
011111
SV01770
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset Value 0x0000202F
Bit 31..14
R/W Unused bits read ‘0’
Bit 13..8
R/W base_fifo: Base address of the FIFO
Bit 7, 6
R/W Unused bits read ‘0’
Bit 5..0
R/W end_fifo: End address of the FIFO
base_fifo
100000
end_fifo
101111
SV01771
2000 Dec 15
67
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