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PE4239 查看數據表(PDF) - Peregrine Semiconductor Corp.

零件编号
产品描述 (功能)
比赛名单
PE4239
PEREGRINE
Peregrine Semiconductor Corp. PEREGRINE
PE4239 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Figure 3. Pin Configuration (Top View)
pin 1
RF1 1
GND 2
RF2 3
6 CTRL or VDD
5 RFC
4 CTRL
Table 2. Pin Descriptions
Pin
Pin
No.
Name
Description
1
RF1
RF1 port (Note 1)
Ground connection. Traces should be
2
GND
physically short and connected to
ground plane for best performance.
3
RF2
RF2 port (Note 1)
4
CTRL
Switch control input, CMOS logic level.
5
RFC
Common RF port for switch (Note 1)
This pin supports two interface options:
Single-pin control mode. A nominal 3-
volt supply connection is required.
6
CTRL or
VDD
Complementary-pin control mode. A
complementary CMOS control signal
to CTRL is supplied to this pin. By-
passing on this pin is not required in
this mode.
Note 1: All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
PE4239
Product Specification
Table 3. Absolute Maximum Ratings
Symbol
VDD
VI
TST
TOP
PIN
VESD
Parameter/Conditions
Power supply voltage
Voltage on any input
Storage temperature
range
Operating temperature
range
Input power (50)
ESD voltage (Human
Body Model)
Min
-0.3
-0.3
-65
-40
Max
4.0
VDD+
0.3
Units
V
V
150
°C
85
°C
30 dBm
1500
V
Table 4. DC Electrical Specifications
Parameter
VDD Power Supply
Voltage
IDD Power Supply Current
(VDD = 3V, VCTRL = 3V)
Control Voltage High
Control Voltage Low
Min
2.7
0.7x VDD
Typ Max Units
3.0
3.3
V
250
500
nA
V
0.3x VDD V
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
©2002-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 9
Document No. 70-0068-02 UltraCMOS™ RFIC Solutions

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