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42671-00 Datasheet PDF : 4 Pages
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PE42671
Preliminary Specification
Table 4. Pin Descriptions
Pin No.
1
2
3
4
5
Pin Name
ANT
RX16
GND5
TRX16
GND5
Description
RF Common – Antenna
Redundant ANT pins for flexible bonding
RF I/O – RX1
Ground
RF I/O – TRX1
Ground
6
ANT
RF Common – Antenna
Redundant ANT pins for flexible bonding
7
GND5
Ground
8
TX16
RF I/O - TX1
9
GND5
Ground
10
GND5
Ground
11
VDD
Supply
12
V1
Switch control input, CMOS logic level
13
GND5
Ground
14
V2
Switch control input, CMOS logic level
15
V3
Switch control input, CMOS logic level
16
GND5
Ground
17
GND5
Ground
18
TX26
RF I/O – TX2
19
GND5
Ground
20
TRX26
RF I/O – TRX2
21
GND5
Ground
22
RX36
RF I/O – RX3
23
GND5
Ground
24
RX26
RF I/O – RX2
Notes: 5. Bond wires should be physically short and connected to
ground plane for best performance.
6. Blocking capacitors needed only when non-zero DC
voltage present.
Figure 3. Pad Configuration (Top View)
RX1 2
GND 3
TRX1 4
GND 5
ANT 6
GND 7
TX1 8
GND 9
1
PE42671
Die
24 RX2
23 GND
22 RX3
21 GND
20 TRX2
19 GND
18 TX2
17 GND
GND 10 11
12 13 14 15 16
Table 5. Truth Table
Path
TX1 - ANT
V3
V2
V1
0
0
0
TX2 - ANT
0
0
1
TRX1 - ANT
0
1
0
TRX2 - ANT
1
1
0
RX1 - ANT
0
1
1
RX2 - ANT
1
0
0
RX3 - ANT
1
0
1
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 6. Ordering Information
Order Code
42671-90
42671-99
42671-00
Description
PE42671-DIE-D
PE42671-DIE-400G
PE42671-DIE-1H
Package
Film Frame
Waffle Pack
Evaluation Kit
Shipping Method
Wafer (Gross Die / Wafer Quantity)
400 Dice / Waffle Pack
1/ box
Document No. 70-0196-03 │ www.psemi.com
Contact sales@psemi.com for full version of datasheet
©2005-2006 Peregrine Semiconductor Corp. All rights reserved.
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