SY100S341JZ(2007) 查看數據表（PDF） - Micrel
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SY100S341JZ Datasheet PDF : 6 Pages
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Micrel, Inc.
TIMING DIAGRAMS
CLOCK
PARALLEL
tPLH
OUTPUT
tTLH
0.7 ± 0.1 ns
1/fshift
tPHL
tpw (H)
0.7 ± 0.1 ns
–0.95V
80%
50%
20%
–1.69V
–0.95V
–1.69V
tTHL
Propagation Delay and Transition Times
SY100S341
Pn, Sn, Dn
tS
CLOCK
50%
tH
50%
–0.95V
–1.69V
–0.95V
–1.69V
Set-up and Hold Times
Notes:
1. VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND.
2. tS is the minimum time before the transition of the clock that information must be present at the data input.
3. tH is the minimum time after the transition of the clock that information must remain unchanged at the data input.
M9999-042307
hbwhelp@micrel.com or (408) 955-1690
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