PI5A125
11223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344S5566i77n8899g00l11e2211W223344i55d6677e8899B0011a2233n44d5566w7788i99d0011t22h3344A556677n88a9900l11o22g112233S44w556677it8899c00h1122
Test Circuits/Timing Diagrams
+5V
SwIniptcuht +3V* A
VCC B
OE
LInopguict
GND
VOUT
LInopguict
+3V
0V
R10L0Ω 1C5LpF
OSwutiptcuht 0V
( ) CL INCLUDES FIXTURE AND STRAY CAPACITANCE
VOUT = VNO
RL
RL + RON
Figure 1. Switching Time
50%
ttfr
<20ns
<20ns
VOUT 90%
tON
tOFF
90%
* 1.5V FOR 3.3V SUPPLY
+5V
RGEN
A
VGEN
V+
B
Logic
Input
OE
GND
VOUT
CL
1nF
VOUT
OE
OFF
∆VOUT
ON
∆ Q = ( VOUT)(CL)
OFF
Figure 2. Charge Injection
4
PS8199D 01/12/01